Senior technology consultant with over two decades of expertise in semiconductor design, verification, and architecture. Specialized knowledge spans DDR SDRAM memory controller design, constrained random verification methodologies, and SoC integration across multiple leading companies in semiconductor and networking sectors. This expert brings extensive practical experience in RTL implementation, FPGA design verification, and HDL-level analysis for patent infringement determinations. Named inventor on nine U.S. patents in memory controller optimization, virtual address translation, and SoC design. Senior member of IEEE and ACM.
Formal Education
- Master of Science in Computer Science from University of California Los Angeles
- Bachelor of Science in Computer Engineering from Carnegie Mellon University
Career Highlights
- Principal Consultant at a silicon services consulting firm, specializing in ASIC/FPGA architecture, SoC verification, and memory controller design
- Senior Member of Technical Staff at a high-performance computing company, leading high-throughput search indexer design and vectorized algorithm development on x86 processors
- Senior Member of Technical Staff at a networking equipment company, developing network processor design and DDR SDRAM memory controller optimization for high-throughput applications
- Senior Design Engineer on chipset design team at a leading semiconductor manufacturer, with responsibilities in RTL implementation, synthesis, and verification
- Graduate Student Researcher at a leading research university on federally-funded research for optical interconnect systems
Expert Qualifications
- Testified as expert witness in patent litigation addressing semiconductor design and verification methodologies
- Served as consulting expert for multiple organizations in patent litigations and ITC investigations involving semiconductor architecture and mobile device design
- Named inventor on nine U.S. patents in memory controller optimization, virtual address translation, and SoC design
- Senior member of IEEE and ACM with peer-reviewed publications on FPGA synthesis, optical interconnects, and hardware design methodologies
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Frequently Asked Questions
What types of cases can this expert support?
This expert handles patent litigation in semiconductors, particularly cases involving memory controllers, digital design, and SoC architecture. They've testified in patent cases before and worked on semiconductor disputes in both litigation and ITC investigations. You'd want them for cases involving chip design, HDL-level infringement analysis, or automotive/mobile device electronics.
What is this expert's technical background?
This expert has a CS MS and Computer Engineering BS from top universities, then spent 20+ years at semiconductor companies—from senior design engineer on chipset teams to leading SoC verification work at high-performance computing firms. They've been principal consultant on ASIC/FPGA architecture and hold nine patents in memory controller and SoC design.
What technologies does this expert specialize in?
They know Verilog and SystemVerilog (UVM), VHDL, FPGA design, and PCIe validation. DDR SDRAM memory controller design is a core specialty, along with constrained random verification and RTL infringement analysis. Network processor architecture and processor ISA verification round out the technical depth.
- Verilog RTL design and verification
- DDR SDRAM memory controller design
- SystemVerilog UVM verification
- FPGA design verification
- SoC integration and verification
- VHDL code examination
- Network processor architecture
- PCIe platform validation
- RTL infringement analysis
- U.S. District Courts
- International Trade Commission