Consulting electrical engineer with more than three decades of industry experience in the design and product development cycle of microprocessors, System-on-Chip (SoC) semiconductors, and mixed-signal ASICs, including for audio/video digital signal processing (DSP) and image processing applications.  Has significant expertise in all aspects of VLSI and SoC design methodology, from microarchitecture to algorithm development to RTL and physical design including custom data path, standard cell place/route, and implementation in FPGAs.

Formal Education

  • M.S. in Electrical Engineering, University of California at Berkeley
  • B.S. in Electrical Engineering, University of Michigan

Career Highlights

  • Extensive knowledge of high-speed techniques in computer arithmetic hardware
  • Developed a High-Definition Audio (HDA) bridge interface FPGA to communicate with standard I2S audio codecs
  • As a consultant to AMD, automated and optimized compilation of a WiGig (IEEE 802.11ad) baseband/MAC subsystem for wireless video codec SoC emulation and developed a set of validation tests in Python
  • Completed a thesis on efficient MPEG block-based video motion
  • Implemented the texture filter and blending unit for a 3D graphics pipeline for a VLIW processor 
  • Architected and designed hardware to implement algorithms on FPGAs for a compressive sensing infrared (IR) camera
  • Named inventor on four issued U.S. patents for novel electronics design methods 

Expert Qualifications

  • On behalf of plaintiff, Hitachi, reviewed source code from video codec design files written in Verilog and wrote an expert report summarizing lines of code relevant to alleged patent infringement 
  • Reviewed source code from audio codec design files written in Verilog for defendants in another U.S. District Court patent infringement case
  • Provided expert declarations and was deposed regarding a set of three related IPRs before the U.S. Patent and Trademark Office’s PTAB involving graphics-related patents