Electrical engineer and computer scientist with extensive technical skills in both digital electronics and software and a track record of delivering successful silicon and system designs. Has designed and verified a variety of semiconductors including System-on-Chips (SoCs), ASICs, and FPGAs. Specialized technical expertise includes memory controllers (SDRAM, DDR), high-speed communication interfaces (PCIe, SATA, USB), wireless devices, and other processor peripherals.

Formal Education

  • M.S. in Computer Science, University of California
  • B.S. in Electrical Engineering, University of California
  • MBA, Golden Gate University

Career Highlights

  • While director of digital design at a communications semiconductor company, led a technical team of six in the digital architecture and implementation of an ASIC design for 10G Ethernet over twisted pair
  • Former chip designer at a major technology company who developed a floating-point unit pipeline, various modules for a microprocessor, and the writeback cache microcode for a processor implementation
  • Designer of various other semiconductors, including for 802.11 WiFi wireless networking, DOCSIS cable modems, and bus, cache, and memory interface controllers
  • Named inventor on about a dozen issued U.S. patents including for novel designs interfacing memories to optimize processor performance

Expert Qualifications

  • Specialist in source code and electronics design reviews who has consulted on patent litigations in each of the major venues
  • Reviewed hardware design HDL source code for GPU chips and submitted an expert report to the U.S. International Trade Commission in a patent infringement action against Samsung and Qualcomm
  • Consulting expert for Oracle in relation to alleged Java API copyright infringement by Google in U.S. District Court for Northern California
  • Reviewed Verilog and C++ source code for a financial markets trading accelerator FPGA and assisted the testifying expert in report drafting
  • Submitted expert declaration in Inter Partes Review (IPR) at PTAB in relation to a patent for buffered DRAM technology
  • Consulting expert on Bitcoin technology for an arbitration

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Frequently Asked Questions

What types of cases can this expert support?

They've worked on patent litigation in federal court, the ITC, and Inter Partes Reviews at the PTAB. Cases involving semiconductor design, software patents, and hardware-software integration are their wheelhouse—they do source code reviews and electronics design analysis.

What is this expert's technical background?

B.S. in Electrical Engineering and M.S. in Computer Science from UC. They spent years as a chip designer at AMD working on microprocessor modules and cache design, then led digital design teams at a communications semiconductor company building high-speed Ethernet chips.

What technologies does this expert specialize in?

ASICs, FPGAs, memory controllers (SDRAM, DDR), and high-speed interfaces like PCIe, USB, Ethernet. Coding: C++, Verilog, VHDL, Python. They've designed for WiFi, cable modems, and security-related electronics.