D/A converter

(dee to ay converter) n. A hardware device that takes a set of bits, typically from a processor, as input and produces an analog signal proportional to the digital input as output. Short for digital-to-analog converter. Abbreviated DAC. D/A converters might be as simple as an array of resistors configured in the typical "R-2R" fashion or a hybrid module that generates very precise results with many bits of resolution. A simple use is to vary the intensity of a lamp (another approach that avoids the messy analog world is a pulse-width modulator that uses different switching rates and pulse lengths to control intensity).

See also A/D converter.

data bus

n. A set of electrical signals connected to the processor and all of the memory and peripheral devices with which it communicates for the purpose of transferring data between them. When the processor wants to read (write) the contents of a memory location or register within a particular peripheral, it sets the address bus pins appropriately and receives (transmits) the contents on the data bus. One unit of data is transferred in each memory cycle.


n. In a real-time system, the time at which a particular set of computations or data transfers must be completed. There are typically consequences associated with missing a deadline. If the deadline absolutely, positively must be met every time or else, it is called a hard deadline. Hard deadlines have dire consequences when missed. Other deadlines are said to be soft deadlines.


n. An unwanted software situation in which an entire set of tasks is blocked, waiting for an event that only a task within the same set can cause. If a deadlock occurs, the only solution is to reset the involved set of tasks or the entire system. However, it is usually possible to prevent deadlocks altogether by following certain software-design practices. Consult an operating systems textbook for details.

circular wait

A key condition for deadlock is a circular wait, such as that shown here.

debug monitor

n. A piece of embedded software that has been designed specifically for use as a debugging tool. It usually resides in ROM and communicates with a debugger via a serial port or network connection. The debug monitor provides a set of primitive commands to view and modify memory locations and registers, create and remove breakpoints, and execute your program. A remote debugger with knowledge of the command format communicates with the debug monitor and combines these primitives to fulfill higher-level requests like program download and single-step.


n. A tool used to test and debug software. A typical remote debugger runs on a host computer and connects to the target through a serial port or over a network. Using the debugger, you can download software to the target for immediate execution. You can also set breakpoints in the code and examine the contents of specific memory locations and registers.

device driver

n. A software module that hides the details of a particular peripheral and provides a high-level programming interface to it. Each device driver is typically a piece of operating system-specific software that makes it possible for application software to attach to, read and write data from, and change the behavior of the peripheral device. The more complex the operating system environment, the more likely it is that the device driver code will have to conform to a certain high-level API. For example, Windows and Unix both require every network device driver to conform to a common API.

device programmer

n. A tool for programming EPROMs, PLDs, nonvolatile memories, and other electrically programmable devices. Typically, the programmable device is inserted into a socket on the device programmer, and the contents of a memory buffer are then transferred into it. So-called gang programmers create several devices from the same image simultaneously.

digital filter

n. A filter that's implemented digitally. A digital filter accepts digital inputs (typically samples read from an A/D converter) and produces digital outputs. The data is processed in firmware running on a digital signal processor. [more]

digital signal processor

n. A device that is similar to a microprocessor, except that the internal CPU has been optimized for use in applications involving discrete-time signal processing. Abbreviated DSP. In addition to standard microprocessor instructions, DSPs usually support a set of specialized instructions, like multiply-and-accumulate, to perform common signal-processing computations quickly. A Harvard architecture, featuring separate code and data memory spaces, is commonly used to speed data throughput. Common DSP families include Texas Instruments' 320Cxx and Motorola's 5600x series.

digital signal processing

n. Whether involving a DSP or not, the work of digital signal processing experts is to communicate and compress audio and video data.

direct memory access

n. A technique for transferring data directly between two peripherals (or memory and an I/O device) with only minimal intervention by the processor. Abbreviated DMA. DMA transfers are managed by a third device called a DMA controller, which shares the memory bus with the processor. Unused memory cycles are stolen by the DMA controller. The processor is only involved, via an interrupt, once the entire block of data has been transferred. In that way, the processor is freed to do other things and overall throughput is increased.

down counter

n. A counter that counts down, from its maximum value toward zero. [more]

Contrast with up counter.


(dee ram) abbr. A type of RAM that maintains its content only as long as the data stored in the device is refreshed at regular intervals. Short for Dynamic Random Access Memory. The repetitive row by column refresh access cycles are usually performed by a peripheral called a DRAM controller. If this isn't done every few milliseconds, some or all of the data stored in the memory can be lost. DRAM is much cheaper per byte than SRAM because it requires just one transistor per bit rather than four to six; however, it has longer access times. DRAM's lower cost per byte makes it attractive whenever large amounts of RAM are required. Many systems include both types: a small block of SRAM (a few kibibytes) along a critical data path and a much larger block of DRAM (mebibytes perhaps) for everything else. [more]


(as letters) abbr. See digital signal processor.