Professor of the Practice in electrical and computer engineering with over 25 years of senior technical leadership in semiconductor design and microprocessor architecture. This expert has led the design of next-generation multi-core processors and developed novel RISC-V instruction set extensions, with particular strengths in FPGA systems, AI accelerators, neuromorphic computing, and hardware security. Currently co-leading an advanced computer architecture research laboratory. Author of 70+ U.S. patents demonstrating thought leadership in chip design and processor innovation.
Formal Education
- Ph.D. in Electrical and Computer Engineering from University of Wisconsin-Madison
- B.S. in Computer Engineering from University of California Santa Cruz
Career Highlights
- Chief Architect for multi-core SPARC microprocessors (UltraSPARC IV and IV+) at a major technology company
- Research Scientist at a leading semiconductor company on hardware-software codesign for multi-core systems
- Chief Hardware Architect developing novel RISC-V domain-specific instruction set extensions
- Strategic SoC Architect at a leading semiconductor company, contributed to advanced FPGA architecture and hardware security innovations
- CEO and founder of a company developing advanced motion capture smart apparel systems
- Director of Disruptive Innovation at a major technology company, led innovative mobility solutions
- Co-lead of a computer architecture research laboratory at a leading research institution
Expert Qualifications
- Extensive expertise in semiconductor patent disputes involving microprocessor architecture, instruction set design, and FPGA systems
- Proven track record of technical leadership and innovation in complex hardware-software systems
- Strong patent record demonstrating thought leadership in chip design and computer architecture
- Experience explaining complex technical concepts to legal and business stakeholders in patent litigation contexts
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Frequently Asked Questions
What types of cases can this expert support?
Patent disputes in semiconductor design, AI accelerators, computer security, and firmware systems. They spent 25+ years designing microprocessors, FPGAs, and hardware security solutions. They have litigation experience, though it's moderate rather than extensive.
What is this expert's technical background?
Ph.D. in electrical and computer engineering with 25+ years in semiconductor leadership. Chief Architect for SPARC microprocessors, RISC-V instruction sets, FPGA design, and AI accelerators. Currently co-leads a computer architecture research lab.
What technologies does this expert specialize in?
RISC-V and SPARC microprocessor architectures, FPGA system-on-chip design, AI accelerators, neuromorphic computing, hardware security, network-on-chip optimization, and 7nm chip design. They hold 70+ patents in microprocessor architecture. Specific strengths include UltraSPARC IV microarchitecture and chiplet interface design.
- RISC-V instruction set extensions
- SPARC microprocessor architecture
- FPGA system-on-chip design
- AI accelerator architecture
- Neuromorphic computing systems
- Hardware security design
- Network-on-chip optimization
- 7nm chip design
- Chiplet interface design
- U.S. District Courts
- Patent Trial and Appeal Board