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(as letters) 1. abbr. Short for input/output.

2. n. The interface between a processor and the world around it. The simplest examples are switches (inputs) and LEDs (outputs).

I/O device

n. A piece of hardware that interfaces between the processor and the outside world. Common examples are switches, LEDs, serial ports, and network controllers.

USAGE: This term is generally interchangeable with peripheral.

I/O map

n. A table or diagram containing the name and address range of each I/O device addressable by the processor within the I/O space.

I/O map

An I/O map for a 186 microcontroller with its peripheral control block left in the I/O space

I/O space

n. A special memory region provided by some processors and generally reserved for the attachment of I/O devices. Memory locations and registers within a processor's I/O space can only be accessed via special opcodes. For example, processors in the 80x86 family have special I/O space instructions called in and out. Contrast with memory space.


(eye squared see) abbr. An inexpensive chip interconnection popular on circuit boards. Short for Inter-Integrated Circuit bus. Featuring a two-wire synchronous (data and clock) connection, I2C can run at speeds up to 100 kHz ("standard") or 400 kHz ("high speed") and is multidrop. [more]

See also SPI.


(like frozen water) abbr. See in-circuit emulator.

in-circuit emulator

n. A debugging tool that takes the place of (emulates) the processor on the target board. Abbreviated ICE and often called an emulator for short. The ICE is a bridge between the target system and a software debugger running on the host. It provides the resources needed to access the target microprocessor. An emulator connects to or completely replaces the target CPU via a large cable, which routes all signals to the ICE unit. In-circuit emulators frequently incorporate a special bond-out version of the target processor that brings normally buried signals out of the chip to the ICE's logic circuits. [more]

in-circuit emulator

An in-circuit emulator from Applied Microsystems

HISTORY: Intel invented the emulator in the mid-1970s with the first of their famous "blue boxes" for the 8080 microprocessor. Emulators and microprocessors evolved concurrently for many years, CPU manufacturers often paying ICE vendors' NRE costs to build units for each new processor. But bond-out parts are very expensive and ship in miniscule volumes, so semiconductor vendors became more reluctant to produce them. As more components migrated onto the chip (prefetchers, cache, pipelines, etc.) bond-outs became ever more necessary. Furthermore, higher speeds and difficult packages made ICEs more and more problematic. For these reasons, the emulator's past dominance is diminishing in favor of JTAG and BDM debuggers.

instruction pointer

n. A register in a processor that contains the address of the next instruction to be executed.

USAGE: The term program counter is often used.


n. An asynchronous electrical signal from a peripheral to the processor. When the peripheral asserts this signal, an interrupt is said to occur. When an interrupt occurs, the current context is saved and an interrupt service routine is executed. When the interrupt service routine exits, control of the processor is returned to whatever part of the software was previously running. [more]

interrupt latency

n. The amount of time between the assertion of an interrupt signal and the start of the associated interrupt service routine. Factors that affect interrupt latency include the length of time that interrupts are disabled during normal program execution, processor speed, and preemption of the processor by higher priority interrupts. [more]

interrupt service routine

n. A small piece of software executed in response to a particular interrupt. Abbreviated ISR. [more]

USAGE: The term interrupt handler is equivalent.

interrupt type

n. A unique number associated with each interrupt. The interrupt type is typically the processor's index into the interrupt vector table.

interrupt vector

n. The address of an interrupt service routine.

USAGE: This term is sometimes used incorrectly to refer to either the interrupt type or the address of the interrupt vector.

interrupt vector table

n. A table containing interrupt vectors, indexed by interrupt type, that maps interrupts and interrupt service routines. The interrupt vector table must be initialized before interrupts are enabled.

intertask communication

n. The passing of data between tasks in a multitasking system. Although perverse programmers can accomplish this communication with global variables, all decent RTOSes include extensive resources (mailboxes, queues, etc.) to safely transfer data without risk of race conditions.

intertask synchronization

n. The coordination of timing and ordering between tasks in a multitasking environment. All decent RTOSes include resources (semaphores, monitors, etc.) to safely synchronize without the risk of race conditions.