Using the ARM Cortex-M3 Processor

The following is a summary of the major course topics and should not be considered the section-by-subsection lecture breakdown.

Overview

• ARM v7 architecture
• Thumb-2 instruction set
• Cortex families
• Key comparisons vs. ARM7/9
• Comparisons vs. other low-power 8/16 bit CPUs

Processor Model

• Register set
• Thumb-2 instruction set
• Operating modes
• Exception processing
• On-chip timer

Performance Features

• Harvard Architecture
• Low Power core
• Low & deterministic interrupt latency
• Special instructions
• Architecture features
• Multi-process/multi-tasking support
• Unaligned access

Exceptions & Interrupts

• NVIC interrupt controller
• Prioritized interrupts
• Dynamic interrupt priorities
• Nested interrupts
• Other exceptions
• Exception tail-chaining

Memory Protection Unit

• Motivation / benefits of MPU
• Protection and performance attributes
• Read / write configuration
• Code / data configuration
• Protected kernel / supervisor memory

Software Development

• Stack-based architecture
• C-friendly, no assembly required
• Stack & heap configuration
• Processor operating modes
• Porting between CM3 chips

Porting from ARM7/9

• Register models
• Banked registers vs. stack architecture
• Special instructions
• Exception processing & vector table
• Memory layout
• Startup code
• Porting 32-bit ARM assembly code

Debug Support

• Debug via JTAG and/or debug port
• Embedded trace
• Data watchpoints
• Flash patching / overlay
• Instrumentation Trace Macrocell

Third-Party Support

• Development tools
• Silicon vendors
• Boards
• RTOS