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Course Length: 
2 Days

The ARM Cortex-M3 is a high performance, low cost, and low power microcontroller. This course will introduce you to the features and capabilities of the Cortex-M3 that will make your next embedded system design a success.


  • Electrical engineers using or planning to use ARM Cortex-M3
  • Embedded software developers writing code for ARM Cortex-M3


The following outline is provided as a summary of the major course topics and should not be taken as literally the section-by-subsection lecture breakdown.

  • Overview
    • ARM v7 architecture
    • Thumb-2 instruction set
    • Cortex families
    • Key comparisons vs. ARM7/9
    • Comparisons vs. other low-power 8/16 bit CPUs
  • Processor Model
    • Register set
    • Thumb-2 instruction set
    • Operating modes
    • Exception processing
    • On-chip timer
  • Performance Features
    • Harvard Architecture
    • Low Power core
    • Low & deterministic interrupt latency
    • Special instructions
    • Architecture features
    • Multi-process/multi-tasking support
    • Unaligned access
  • Exceptions & Interrupts
    • NVIC interrupt controller
    • Prioritized interrupts
    • Dynamic interrupt priorities
    • Nested interrupts
    • Other exceptions
    • Exception tail-chaining
  • Memory Protection Unit
    • Motivation / benefits of MPU
    • Protection and performance attributes
    • Read / write configuration
    • Code / data configuration
    • Protected kernel / supervisor memory
  • Software Development
    • Stack-based architecture
    • C-friendly, no assembly required
    • Stack & heap configuration
    • Processor operating modes
    • Porting between CM3 chips
  • Porting from ARM7/9
    • Register models
    • Banked registers vs. stack architecture
    • Special instructions
    • Exception processing & vector table
    • Memory layout
    • Startup code
    • Porting 32-bit ARM assembly code
  • Debug Support
    • Debug via JTAG and/or debug port
    • Embedded trace
    • Data watchpoints
    • Flash patching / overlay
    • Instrumentation Trace Macrocell
  • Third-Party Support
    • Development tools
    • Silicon vendors
    • Boards
    • RTOS


Attendees should already be familiar with microprocessors and C programming.

Find out More

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Contact Us to find out more about this course or to enquire about an on-site training at your company.

Recording Policy

All Barr Group Training Public and On-site courses may not be videotaped or photographed without consent from Barr Group's executive team.